I. Field
The present disclosure relates generally to electronics, and more specifically to a floating-point accumulator.
II. Background
In digital processors, numerical data may be expressed using integer or floating-point representation. Floating-point representation is used in many applications because of its ability to express a wide range of values and its ease of manipulation for some arithmetic operations. Floating-point representation typically includes three components: a sign bit (sign), a mantissa (mant) that is sometimes referred to as a significand, and an exponent (exp). A floating-point value may be expressed as (−1)sign×mant×2exp.
Floating-point accumulation is an arithmetic operation that is commonly performed for various applications such as graphics, digital signal processing, etc. Floating-point accumulation typically entails (1) receiving an input floating-point value and an accumulated floating-point value, (2) aligning the mantissas of the two floating-point values based on their exponents, (3) summing the two aligned mantissas, and (4) post-aligning the result for normalization. Each of steps 2, 3 and 4 require some amount of time to perform. The total time for these steps may limit the speed at which a processor can operate.